《数字电子时钟设计与研究》.doc

毕 业 设 计（论文） 题 目：数字电子时钟设计与研究 摘 要 数字钟实际上是一个对标准频率（1H）进行计数的计数电路由于计数的起始时间不可能与标准时间（如北京时间）一致，故需要在电路上加一个校时电路1秒响1秒停地响5次。 为了使数字钟使用方便，在设计上使用了一个变压器和一个整流桥来实现数字钟电能的输入，使得可以方便地直接插入220V的交流电就可以正常地使用了。 关键词：数字钟；振荡；计数；校正；报时 ABSTRACT A digital clock is actually a standard frequency (1Hz) to count count circuit. Produced by the clock signal oscillator is forming second pulse separate frequency signal, second pulse signal input counter, and the total count the, to division and second digital display. Seconds after counter circuit plan trigger points with 60 counter circuit, points counter circuit plan trigger after full 60 when, when the program counter circuit after 24 hours and start the next round of cycle count. Generally by oscillator, points, counters, the frequency of an decoder, digital display to wait for a few parts. Oscillating circuit: mainly used to produce the time standards of accuracy signal, because the clock mainly depends on the signal frequency and time standards, so stability using quartz crystal oscillator. Editor: because oscillator separate frequency produce standard signal frequency is very high, if only to get the second signal, need certain series can separate frequency separate frequency. Counter: there were seconds signal, can according to 60 seconds for 1 minute, 24 hours a day for 1 day into the system, set up separately , points, seconds counter, respectively is 60 disables, 60 disables, 24 disables the counters and output a points, an hour, a day of binary signals. Decode display: points seconds displayed. Will counter input states, input to decoder, produce drive digital display signal, presents the corresponding carry digit fonts. Because the start time of counting impossible and standard time (such as Beijing time), so it needs to agree on a school in the electrical circuit can add when to points and in school. In addition, timer process will have to strike the function, when time before the hour, 10 seconds began buzzer 1 second ring 1 second