基于VHDL的UART控制器设计毕业论文.doc

摘 要 UART（Universal Asynchronous Receiver/Transmitter），通用异步接收/发送装置MAX+plus II 10.2下进行编译及仿真，从而实现能够更改灵活、既方便又实用的UART具有重要意义。 关键字：FPGA，VHDL，UART，接收，发送 Abstract UART(Universal Asynchronous Receiver/Transmitter)，is the key of communications between devices.When a device needs to communicate with a connected device,usually digital signals applied,which must be transformed into serialised signal to another device. UART processes this serial_data to parallel_data /parallel _data to serial_data transform between data bus and slave port. This paper is to implement this serial to parallel and parallel to