Software Fault Tolerance Using Dynamically Reconfigurable FPGAs.pdfVIP

Software Fault Tolerance Using Dynamically Recongurable FPGAs Kevin A Kwiat Warren H Debany Jr Rome Lab oratory RLERDA Bro oks Rd Rome NY Salim Hariri Electrical Computer Engineering Department Syracuse University Syracuse NY Abstract A n emerging class of FieldProgrammable Gate Arrays FPGAs permits partial reconguration of the device without disturbing the rest of the array even while the device is operating Dynamic device reconguration al lows novel approaches to the migration of algorithms fr om software to hardware New simulation tools are required in order to ful ly exploit the FPGAs versatility We demonstrate how FPGA cel ls can be pr ogrammed and reprogrammed to pr ovide a virtual FPGA that is much larger than the physic al FPGA In the context of dependable computing our FPGAbased approach shows promise of signicant performance gains over traditional softwareintensive approaches We apply this capability to the enhancement of software fault tolerance Intro duction Fault tolerance is the ability of a computer system to function despite having faulty comp onents Software com p onents are esp ecially susceptible to unanticipated faults For example the Ap ollo lunar missions were one of the most carefully planned and executed software pro jects ever undertaken yet nearly all the ma jor problems in the series were attributed to software design faults Tolerating faults of this typ e through software fault tole