NiosIISOPCBuilder.docVIP

Designing with Nios II and SOPC Builder Bootcamp Exercise Manual  Lab 1 Creating a Nios II System Hardware set up requirements: ByteBlaster, ByteBlaster II, Byte Blaster MV, or USB-Blaster connected between computer and ByteBlaster connection on development board Power supply connected to the board Create a directory on the C drive of your computer called “altera_trn” if it doesn’t exist already. Copy the self-extracting zip file nios_II_lab_QII4.2.exe to that directory and double click on it. This will unzip the lab files to a directory called nios_II_lab. Among these files is a partially completed Quartus II project that we will use today. Start the Quartus II Software, and open this Quartus II project via the menu option File = Open Project… Browse to directory C:\altera_trn\niosII_lab, and select the project niosII_lab.qpf. Click Open. Assign device family and pinout settings to the Quartus II project by sourcing one of the TCL scripts provided, This will assign the relevant device settings and pinouts for the particular FPGA development board you are using. From the Tools menu select Tcl Scripts, and then from the project folder choose the setup script for your particular development board (eg. Setup_Cyclone_1C20.tcl, etc.), and click Run. (If you are unsure of which script to run please check the FPGA on your development board or consult the workshop co-ordinator.) Let’s now build our embedded system! Start SOPC Builder from Tools = SOPC Builder… and provide the system name, niosII, when the next window pops up. You can choose VHDL or Verilog (whichever you prefer) as the implementation language. The blank SOPC builder window will open. Set Target Device Family to that of the particular device that you are using (ie. Cyclone, Stratix, or Stratix II), set the Target to the corresponding development kit, and ensure that the Clock frequency is set to 50 MHz. Note: As a corollary to the previous step, by spe