全志A13原理图(Q8).pdfVIP

55 4 4 3 3 2 2 1 1 D D C C B B A A COVER CPL ApprovedDrawn CheckedDateDescriptionRevision APP3_PAD_DDR3_V1_10 MOTORCARD HEADPHONESPEAKER LCD USB0 OTG KEY G-Sensor Interconnect Network,and Power Driven USB1 WIFI CSI MICNANDDDR3 PMU AXP209 MPU 1V6@1A 3V3@1A 5V@1A LAYOUT：ACIN、BAT、IPSOUT输入或 输出线，从PMU管脚处就要保证尽量粗。 SY8008B DRAM Battery charger /detect IPSOUT 5V-2A ACIN(5V)2A BAT(4.2V) A X P 2 0 9 SY7208SY8008B SY7201 SY7201 LCD AVDDLCD BLUSB OTG USBVBUS （5V-900mA） CARD NAND G-SENSOR LP3992-28B5F 2V8@1A CSI-IO 1V8@1A CSI-CORE LP3992-18B5F 3V@200mA 1V2@1.6A AVCCLDO2 DCDC2 CPU VDD 1V2@1.2A CORE VDDDCDC3 3V3@30mA RTC LDO3 3V3@400mA WIFI LDO1 AP1231B18ZRM AP1231B28ZRM AP3031KTR AP3019KTR MT-EN EINT UART-RX UART-TX PG0 PG1 PG2 PG3 PG4 PG9 PG10 PG11 PG12 CSI-RST PB15 PB16 PB17 PB18 TWI1_SDA TWI1_SCK TP-WAKE-RSTGPIO-OUT GPIO-OUT CSI-PWR-EN NC PA-SHDN PB3 INPUT PB10 GPIO-OUT GPIO-IN USB0-VBUSDET GPIO0 LCD-PWR LCD-BL-EN USB0-DRV GPIO1 GPIO2 GPIO3 TP-INT GPIO-IN USB0-IDDET PB0 PB1 PB2 PB4 TWI0_SCK TWI0_SDA PWM0 GPIO-OUT TWI2_SCK TWI2_SDA DefineCPU Function GPIO-OUT GPIO-OUT GPIO-OUT GPIO-OUT TWI2 TWI1 TWI0 LCD SD0-DET-N TP version 1.10 TP CSI-STY PMU Define Function BLOCK GPIO ASSIGNMENT POWER TREE REVISION HISTORY 9V9@1A 10V4@1AUART-TX UART-RX MOTOR 3V3@200mA MOTORLDO4 特别提醒： 1: PG0 / PG1 / PG2这三个PIN脚 只具有INPUT/中断/专有功能 2: PMU的GPIO0/1/2/3这四个PIN脚 只做GPIO-OUTPUT功能 3: PG10 /PG11 /PG12这三个PIN脚 的功能不可改变 GPIO-OUT Title Size Document Name Rev Date: Sheet of COVER APP3_PAD_DDR3 A3 1 6 55 4 4 3 3 2 2 1 1 D D C C B B A A CPU CRYSTAL LAYOUT：晶振下方不可以走线。 AUDIO-TP 电容值不可更改 TWI-PULLUP CORE GPIO CPU DRAM USB RTC 注：封装为eLQFP176，肚皮为GND， 需完好接地；为方便维修，请在PCB上打 一孔，具体请参照原厂的PCB layout指导 方框内的元件标号请不要修改 方框内的元件标号请不要修改 方框内的元件标号请不要修改 V C C C P U -V D D C P U -V D D S Z Q C P U -V D D C O R E -V D D S D Q 9 S D Q 11 S D Q 15 S D Q 13 S D Q 0 S D Q 2 S D Q 6 D R A M -V C C S D Q 4 S V R E F S D Q 1 S D Q 3 S D Q 7 S D Q 5 D R A M -V C C S D Q 12 S D Q 14 S D Q 10 S D Q 8 D R A M -V C C C P U -V D D V C C VRA1 VRA2 AVCC VR