多功能数字钟电路设计 数电课程设计(国外英文).docVIP

多功能数字钟电路设计 数电课程设计(国外英文).doc

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多功能数字钟电路设计 数电课程设计(国外英文)

多功能数字钟电路设计 数电课程设计(国外英文资料) This paper consists of 3109008923 contributions DOC documents may experience poor browsing on the WAP side. It is recommended that you first select TXT, or download the source file to the local view. Wuhan University of Technology digital electronic technology foundation application curriculum design Course design task book Student Name: Student Name: Instructor: Instructor: XXX professional class: professional class: work unit: work unit: Title: circuit design of multi-function digital clock Initial conditions: initial conditions: 74LS390, 74LS48, digital display, BS202 6, 74LS00 3, 74LS04, Each of the 1 pieces of 74LS08, a number of resistors, capacitors, switches each 2, buzzer 1, wire a number. The main tasks required: the main tasks required: For middle and small scale integrated circuit to design a display date and time, and digital electronic clock, the requirements are as follows: 1. by oscillator circuit generates a 1HZ standard second signal. 2. seconds, divided into 00-59, sixty decimal counter. 3. is the 00-23 twenty-four decimal counter. 4., manual correction: can be divided into seconds, minutes, time correction. Just put the switch in manual position. They can adjust the pulse input for seconds, minutes and minutes respectively. 5. give the whole time. The full point circuit requires five calls (500HZ) before each point, and a 1000HZ at full time. Time management: time arrangement: Twentieth weeks of theoretical design, laboratory installation, debugging, location: Kam master, 15 Floor Communications Laboratory one Instructor signature: Instructor signature: year month day Signature of department head (or duty teacher): signature of Dean (or responsible teacher): year month day Wuhan University of Technology digital electronic technology foundation application curriculum design Circuit design of multifunctional digital clock Abstract...... 1 Abstract...... 21 system principle block diagram...... 32 scheme design and demonstra

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