基于FPGA的高速数据采集卡的设计(毕业设计)探究.doc

本科毕业设计说明书 基于FPGA的高速数据采集卡的设计 学院（部）： 电气与信息工程学院 专业班级： 学生姓名： 指导教师： 年 月 日 基于FPGA的高速数据采集卡的设计FPGA中的预处理难度，使FPGA处理时序余量更加充裕。在ARM与FPGA通信方式上使用DMA传输，大大提高了数据传输的速率，并解放了后端的ARM处理器。设计从宏观上优化数据传输的效率，充分发挥器件的性能，并提出了一些改进系统性能的方案。从微观实现上，数据是从前端数据调理电路进入AD转换器，再由FPGA采集AD转换器输出的数据，后经过数据的触发、成帧等预处理，预处理后的数据再传输给后端的ARM处理器，最后由ARM处理器送给LCD显示。微观实现的过程中遇到了很多问题，主要是在AD数据的采集和采集数据的传输上。在后期的系统调试中遇到了采集数据错位、ARM与FPGA通信效率低下，还有FPGA中预处理时序紧张等问题，通过硬件软件部分的修改，问题都得到一定程度的解决。 在整个数据采集卡的设计过程中还遇到高速PCB设计、硬件设计可靠性、设计冗余性和可扩展性等问题，这些都是硬件设计中的需要考虑和重视的问题，在论文的最后一章有详细论述。 关键词：高速数据采集,触发,高速PCB设计,高速ADC DESIGN OF HIGH-SPEED DATA ACQUISITION CARD BASED ON FPGA ABSTRACT Date acquisition is the premise of measure, the foundation of analysis and the beginning of cognition. Most precise device is based on the date acquisition. With the development of the electronic and digital technology, the speed of date transmission and the calculation of CPU are faster and faster; therefore the requirements of data acquisition and processing are more severe than before. This paper analyzes the system from Macro-and micro respect. From the macro point of view it analyzes data flowing, speed matching and the selection of specific means of communication of acquisition system and so on. We adapt ping-pong mechanism to reduce the speed of analyzing data and pre-difficult of FPGA which lead to the ease of processing Timing Margin of FPGA. DMA transfer is used as communication between ARM and FPGA which improve data transmission rates, and liberate the back-end ARM processor. From the micro point of view, data enter into the A/D converter from the front-end conditioning circuitry, FPGA collecting data on the output of A/D converter and go through the pre-operation of triggering and framing of data. After these operations, data are transmitted to the back-end of the ARM processor and then display on the LCD. A lot of difficult exited in the successful operation in the