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Case History: Development of a Bluetooth Transceiver in RF CMOS
By Bob Koupal Marshall Wang, Signia Technologies
Cory Edelman, Agilent Technologies
The design of Signia Technologies’ Ulysses SBT5010 2.4-GHz Bluetooth transceiver required
special attention to achieve its design using a low-cost CMOS RFIC process. Key performance
criteria were evaluated at all stages of the design process using EDA software that included
integrated foundry models, system-compliance test templates for Bluetooth test signals and links
to test instruments to verify that measured results agreed with simulation data.
The Bluetooth standard was established for short-range wireless transceivers that are embedded
in a wide range of devices, including notebook computers, printers, fax machines, cameras, cell-
phones, head-sets, home appliances, PDAs and other portable devices. Manufacturers of these
devices require that the addition of Bluetooth be accomplished with small size, low power
consumption and low cost. To meet this demand, a System-on-Chip (SoC) solution using a high
level of integration is required. The goal of SoC is to eliminate expensive external components
such as surface acoustic wave (SAW) filters and inductors, to minimize the number of external
passive components and reduce overall cost, eliminating external RF tuning elements to simplify
implementation.
Interference is a significant design issue for Bluetooth radio links, which operate in the non-
licensed 2.4-GHz ISM band with a signal that is frequency hopped over eighty 1-MHz channels
at a rate of 1600 hops per second. Bluetooth links must have reliable operation in the presence of
other RF emitters in the 2.4-GHz band, including other Bluetooth devices, cordless telephones,
microwave ovens and wireless LAN systems such as those using the IEEE 802.11 standard.
A single-chip radio has been the stated goal for many wireless standard
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