fpga部分可重构结构.pptVIP

Intuitive Benefits of using PDR Saves space on the FPGA Less time to change only a part of design Reduction of power dissipation by storing functionality to external memory Smaller FPGAs can be used to run an application NASA’s missions Space missions cannot rely on constant and reliable communication between earth and spacecraft On-board Processing FPGAs Low Cost compared to ASICs Reconfigurable Spacecraft event scheduling Iterative Repair and Simulated Annealing Iterative Repair Processor Iterative Repair and Simulated Annealing Initial solution modified over several iterations Greedy Algorithm – may not yield optimal schedule (solution) Altering the solution randomly Evaluating the solution in a particular way Perfect solution? Different Solutions The way the initial solution is altered The way the solution is evaluated Different alter and evaluate stages Spacecraft Event Scheduling A set of 100 events Need to find the best solution. Different ‘Alter’ functions Impact of ‘alter’ functions Alternate ‘Evaluate’ functions Suppose a problem has three different tasks We can assign different weights to different tasks depending on the degree of importance of each task Can we store different ‘alter’ and ‘evaluate’ functions on the FPGA? Area constraints on the FPGA Solution? PDR based on-board event scheduling Literature Run-time dynamic reconfiguration: a reality check based on FPGA architectures from Xilinx, Wu, K.; Madsen, J., NORCHIP Conference, 2005. 23rd, Vol., Iss., 21-22 Nov. 2005 Pages: 192- 195 Study on column wise design compaction for reconfigurable systems, Kalte, H.; Lee, G.; Porrmann, M.; Ruckert, U., Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on, Vol., Iss., 6-8 Dec. 2004 Pages: 413- 416 Modular partial reconfigurable in Virtex FPGAs, Sedcole, P.; Blodget, B.; Anderson, J.; Lysaghi, P.; Becker, T., Field Programmable Logic and Applications, 2005. International Conference on, Vol., Iss., 24-26 Aug. 2005 Pa