《SOC 设计方法与实现》实验报告（可编辑）.docVIP

《SOC 设计方法与实现》实验报告 /////////////////////////////////////////////////////////////////////////////////// `timescale 1ns/10ps module top_test ; wire clk,rst_n; wire [7:0] abus; wire ale,rbar_n,wbar_n,cs_n; wire pebar_n; wire [7:0] fir_in; wire [7:0] dbus_xio; wire [13:0] hour,mini; wire [20:0] fir_out; wire [15:0] fir_out_sqrt; wire send_data_en; fir_tb Ufir_tb send_data_en,pebar_n,fir_in ; osc_rst Uost_rst clk,rst_n ; TH99CHLS UTH99 dbus_xio, abus, rbar_n, wbar_n, ale, pebar_n, fir_in, cs_n, rst_n, clk, //output ports fir_out, fir_out_sqrt, hour, mini ; mcu Umcu .dbus_xio dbus_xio , .abus abus , .rbar_n rbar_n , .wbar_n wbar_n , .ale ale , .cs_n cs_n , .send_data_en send_data_en ; endmodule ////////////////////////////////////////////////////////////////// module decoder //input hex, //output led ; input [3:0] hex; output reg [6:0] led; always @ hex begin case hex 4b0000:led 7b011_1111; //0 4b0001:led 7b001_1000; //1 4b0010:led 7b111_0110; //2 4b0011:led 7b111_1100; //3 4b0100:led 7b101_1001; //4 4b0101:led 7b110_1101; //5 4b0110:led 7b110_1111; //6 4b0111:led 7b011_1000; //7 4b1000:led 7b111_1111; //8 4b1001:led 7b111_1101; //9 default :led 7b000_0000; //null endcase end endmodule //////////////////////////////////////////////////////////////////// module TH99CHLS //input dbus_xio, abus, rbar_n,