基于JTAG协议的离线编程技术在智能仪表中的应用-测试计量技术及仪器专业论文.docxVIP

郑重声明 本人的学位论文是在导师指导下独立撰写完成的，学位论文没有剿窃、 抄袭等违反学术道德、学术规施的侵权行为，否则，本人愿意承担由此产 生的…切法律责任和法律后果，特此郑重声明。 学位论文作者(签名): 学位论文使用授权声明 本人在导师指导下完成的论文及相关的职务作品，知识产权归属郑州大学. 根据郑州大学有关保留、使用学位论文的规定，同意学校保留或向国家有关部门 成机构送交论文的复印件和电子版，允许论文被查阅和借|到:本人授权郑州大学 可以将本学位论文的全部成部分编入有关数据库进行检索，可以采用影印、缩印 或者其他复制手段保存论文和汇编本学位论文。本人离校后发表、使用学位论文 戚，与该学位论文直接相关的学术论文或成果时，第一署名单位仍然为郑州大学。 保密论文在解密后应遵守此规定。 学位论文作者: 日期: 年月日 ABSTRACT ABSTRACT Wi伽 the improvement of technologicallevel ，the electronic system is more and more integrated，so the product desi伊1should give full consideration ωthe signal test problem. For embedded systems，it usually need 阳 observe and control 也e chips intemal logic and do not affect 也.e normal working when debugging in progress. The general circuit test methods can not meet the f叫uirements of actual demand，80 也e boundar沪scan 阳stmethod wωbom. In 1985，the Joint Test Action Group developed a JTAG Boundary Scan technology，JTAG is consistent wi伽 IEEE 1149.1 stan伽rd. Bounl由叩scandesí伊 via several signallines can check the connect of circuit，the chips intemallogic observations ，broken point test，online programming and other functions which can reduce 仙 difficulty of debugging ，也e cost of development and can improve the speed to market. The da饵 can be sbifted ínω 也e test circuit via JTAG boun巾ry scan units in serial mode，刷出e same time the data output ftom the test circuit in serial mode. Therefore，it only need a little number of intl创faces can 刷刷port si伊al and can reduce 由e occupancy ofhardware resources on tωt circuit. JTAG boun也吵scan testωe cross debugging，t创t code is generated in 也e hostωmp旧时也rough the data bus transfer to the JTAG debugger，由rough 由e JTAG debugg臼 decode control signals and generate functionsωscan 由e test circuit ，test logic，visit and observe on-chip registers and memory . The boun也ry scan regist即is transparent when 伽e chip is in normal working state，so it does not affi回t the chip circuit operation and communication ，so we can use oftline programming techniquesωoperate On-Chip Flash wit