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毫米波功率放大器效率优化.pdf 67页

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ABSTRACT ABSTRACT Efficiency and linearity are important index of power amplifier, but with a certain extent, those are often contradictory. Under the premise of ensuring linearity, to improve the efficiency has become a hot issue in research filed. Through access to a large number of documents, this paper presents a variety of methods to improve the power amplifier efficiency, including Envelope Tracking, Envelope Elimination and Restoration, LINC, Doherty, Harmonic control, Harmonic injection, Tunable Matching Network. Based on the thinking of the Stacked-FET in chip design filed, this paper proposes a new power amplifier architecture in millimeter-wave transmitter. The PAs with Stacked-bias architecture has been developed. With the drain supply voltage up to +24V, the PAs delivers 41.8dBm saturated power form 26GHz to 30GHz. The overall efficiency of transmitter in the framework is about 11%, compared to nearly three percentage points higher in the efficiency of the traditional parallel architecture. Considered to transmitter efficiency is generally lower than 10%, the new framework has a strong engineering applied value. Doherty technology combined with digital pre-distortion, by virtue of its superior performance, has become the mainstream scheme to solve the high efficiency and high linearity of the base station transmitter. With the use of ADS Momentum and schematic diagram co-simulation, we presents a Doherty amplifier design worked in the WCDMA uplink band. The PAs achieve powe


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