飞利浦 I2C器件选用指南.pdfVIP

S e m i c o n d u c t o r s 2 I C Logic Selection Guide 2003 2 I C overview 2 Originally, the I C bus was designed to interact within a small number of devices on a single card, such as to manage the tuning of a car radio or TV. The maximum allowable capacitance was set at 400 pF to allow proper rise and fall times for optimum clock and data signal integrity with a top speed of 100 kbit/s. In 1992, the maximum bus speed was increased to 400 kbit/s, to keep up with the ever-increasing performance requirements of new ICs. The 2 2 latest I C specification, released in 1998, increased top speed to 3.4 Mbit/s. All I C devices are designed to be able to communicate together on the same two-wire bus and system functional architecture is limited only by the imagination of the designer. While its application to bus lengths within the confines of consumer products such as PCs, cellular phones, car radios or TV sets grew quickly, only a few system integrators were using it to span long distances. The I2C bus is now being used in multiple card systems, such as a blade servers and rack mouted servers, where the I2C bus to each card needs to be easy to isolate to allow for card insertion and removal while the rest of the system is in operation. In some systems, many more devices may need to be located onto the same card, where before the total device and trace capacitance would have exceeded 400 pF. New bus extension control devices help expand the I2C bus beyond the 400 pF limit of about 20 to 30 devices and help control more devices, even multiple identical devices with the same address. These new devices are popular with designers as they continue to expand and increase the use of the I2C bus in maintenance and control applications. This selection guide focuses on general purpose devices like General Purpose I/O Expa