一种基于多核流水的多标准视频编解码器体系结构.pdfVIP

计算机研究与发展 ISSN i000—1239／CN ii-l777／TP JournalofComputerResearchandDevelopment 45(ii)：I985—1993，2008 一 种基于多核流水的多标准视频编解码器体系结构 张 鹏 杜建国 解晓东 高 文 (中国科学院计算技术研究所 北京 100190) (zhangpeng@jd1．ac．cn) A M ulti--StandardVideoCodecArchitectureBasedonM ulti--CorePipeline ZhangPeng，DuJianguo，XieXiaodong，andGaoWen (InstituteofComputingTechnology，ChineseAcademyofSciences，Beijing100190) Abstract Supportingmulti—standardisbecomingthetrendofvideocodec，whichbringsthechallenge ofbothperformanceandflexibilityinsystem design．TheauthorsintroducetheVLSIimplementation ofavideocodecarchitecturewhichcansupportmultiplevideocodingstandards，includingH．264／ AVC，AVS，andVC一1．Algorithm characteristicsofthesestandardsarefirstanalyzed．Basedonthe algorithm similaritiesanddifferencesofthem ，severaltechniquesare efficientlyadoptedto optimize thearchitectureatsystem levelandmoduleleve1．Atsystem level，a four—stagemacroblock—based pipelineconsistsoffiveprogrammablecores，andallmodulesoftheencoderanddecoderarecarefully mappedonto thepipeline architecture．Thepipelined multi—corearchitecture can largely improve system performanceby exploiting system levelparallelism whilemaintaining theprogrammability． Andatmodulelevel，dedicateddatapathsareefficientlyembeddedintheprogrammablecorestospeed upthesignalprocessing．Detailed modulelevelHW ／SW partition isproposedaccording tocertain computationin eachmodule．Theimplementationresultsshow thatthecodeccanguaranteereal—time encodingordecodingNTSC (30fps)／PAL (25fps)videosintheworstcase，usingonly961kgate． Keywords multi—core；multi—standard；programmability；videocodec；VLSI 摘 要 多标准 已成为视频编解码器的发展趋势，这给系统设计带来 了性能和灵活性双重的挑战．根据 视频标准间算法的异 同点，提 出并实现 了一种多标准视频编解码器芯片的体系结构，支持包括 H．264／ AVC，AVS和 VC一1的多个标准．系统级采用 了基于宏块的多核流水线结构 ，在保持可编程性的基础上 显著提 高了系统级 的并行度．模块级进行 了详细的软硬划分设计，可配置的专用数据通路用以加速各模 块的特定运算．VLSI实现表明，芯片面积仅为 96lkgate，且能保证 NTSC(30{ps)和