The Synchronous Programming Model and Its Applciations课件.pptVIP

The Synchronous Programming Model and Its Applciations Embedded Systems on Chip Ennemy number 1 : the bug How to avoid or control bugs? Classical computation models are inadequate There are much simpler models ! Concurrency : the compositionality principle Zero delay example: Newtonian Mechanics the most difficult real-time manoeuver ever The synchronous model Software Synchronous Systems Synchronous languages Data vs. Control Data-Dominated Designs Control-Dominated Designs The Evolution: Mixed Designs Embedded software design flow Esterel v7 Hardware Design Flow Formal semantics Structural Operational Semantics (SOS) Compilers Different communities, different needs Different communities, same needs Conclusion Work in progress Some references Data-flow to software (Lustre / SCADE, Signal) inline expansion, toplogical sorting optimization: memory allocation, locality (limited by traceability) Control-flow to hardware (Esterel) structural translation to RTL + sequential optimization program dependency graph + smart encoding (Columbia) Control-flow to software RTL simulation in software (Esterel v5 / v7) static scheduling of control-flow graph (Synopsys) static scheduling of aggregated blocks (France Telecom, INRIA, Columbia) Safety-critical software : keep it simple prefer graphical programming add unit-delays to break cyclic dependencies = strong acyclicity constraints on dependencies = simplified state machines Efficient hardware : maximal power textual programming + some state machines agressively pack computations in the cycle play with combinational / sequential logic (pipeline) accept clever cycles (reincarnation, combinational cycles) = minimal language restrictions Better specifications golden models, linked to system models formal contracts with subcontractors Better synthesis why recode by hand? Better formal verification property checking sequential equivalence Architects and designers start understand