为低压DCDC变换器优化设计的功率MOSFET.pdfVIP

AN805 Vishay Siliconix PWM Optimized Power MOSFETs for Low-Voltage DC/DC Conversion Designers of low-voltage dc-to-dc converters have two main [ ] The value of the parameter before the parenthesis is dependent concerns: reducing size and reducing losses. As a way of reducing on the parameter within the parenthesis. size, designers are increasing switching frequencies. But the result has been reduced converter efficiency. To minimize losses, Drain MOSFET manufacturers have generally focused on lowering IRMS on-resistance. But the results have not been optimal for dc-to-dc conversion designs, since gate charge and switching speed issues have been largely ignored. The dominant losses associated with Crss MOSFETs were once conduction losses, but this is no longer the RG case. Gate Coss Vishay Siliconix’s new family of PWM optimized MOSFETs has Ciss rDS(on) been designed to give the highest efficiency available for a given on-resistance in switching applications such as dc-to-dc conversion. These new devices provide a very low gate charge per unit of on-resistance, in addition to fast switching times. The Source result is reduced gate drive and crossover losses, allowing designers of dc-to-dc