CMOS集成电路设计1研讨.ppt

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CMOS集成电路设计1研讨

June 20 - July 20, 2005 Dalian Institute of Technology, China Yann HU State of the Art in the Analog CMOS Circuit Design Yann-Yongcai HU Professor Institut Pluridisciplinaire Hubert Curien, Strasbourg, France University of Strasbourg, France Why Analog Processing? The “real”?or “physical” world is analog. Analog is an interface technology. In many applications, it’s in the critical path Example: RF receiver Pre-processing Filtering, amplification, frequency Translation DSP Demodulation, decoding Post processing Reconstruction filter, amplification Unique Challenges of Analogue Design Telecommunications and multimedia: RF, Microwave communications Portable telephony PC, Internet System on chip (SOC): MEMS Imagers Scientific Instrumentations: Space Applications Biomedical, High Energy, and Astrophysical applications Bipolar and CMOS technologies Bipolar process: An inherent low input referred noise Low input offset voltage High voltage gain High output drive and high frequency capability CMOS process: Low power consumption High packing density High noise immunity Compatibility with CMOS digital systems Analogue Design Conflicts and Compromises Certain design conflicts: Bandwidth and power consumption Intermodulation and noise Contributions of voltage and current Area and cost Compromises: Each design involves complex, multi-variable interactions, and compromises are inevitable. Robustness, Optimisation and Trade-Offs Choice of architecture (topology): to achieve the most satisfactory overall performances Choice of Technology: Bipolar process: SiGe HBT CMOS process: deep sub-micrometer 90 nm indeed 65 nm BiCMOS Trade-Offs in CMOS Circuits Moore’s Law: It was noted in 1965 by Gordon Moore that the number of transistors on a chip doubles about every year. In an update article in 1975, Moore adjusted the rate to every two years to account for the growing complexity of chips. Rapidly improving circuit performances:

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