锁相环控制器设计.doc

存档日期： 存档编号： 江 苏 师 范 大 学 本科生毕业论文（设计） 论 文 题 目：设计 姓 名： 学 院： 电气工程及自动化学院 专 业： 电气工程及其自动化 班 级 、 学 号： 电41班 284038 指 导 教 师： 江苏师范大学教务处印制 软件采用模块化的设计方法Abstract In order to improve the performance of electronic equipment, the PLL circuit has become an indispensable part in the electronic communication system.Nowadays, with the rapid development of wireless communications, the requirements of stability and accuracy of frequency are increasingly high. And how to improve its performance and frequency has become the majority of research. The frequency synthesizer has become an important part in wireless communications due to insufficient frequency range of crystal oscillator. High frequency signal can be produced by the frequency synthesis technology. This paper mainly designed a frequency synthesizer made up of PLL. The principle of PLL was studied first, and the mathematical model of PLL was established and analysed with automatic control theory. Then the structure of frequency synthesizer with its basic principle and working characteristics was studied. The hardware circuit of frequency Synthesizer was designed by using the CD4046 chip as PLL, combined with counter and so on. The parameters were also designed. The design of circuit was based on the single chip microcontroller STC89C52 and the driver chip HD7279A, using the keyboard to control the PLL chip and display through digital tubes, and the frequency of frequency synthesizer was controled by controlling the frequency division ratio. The software was designed by using the module design method and made the changing the frequency division ratio to be realized. Key words: STC89C52；CD4046；frequency synthesizer 目 录 摘 要 I Abstract II 1 绪论 1 1.1 课题的背景及意义 1 1.2 锁相环的国内研究现状与发展趋势 2 1.3 课题的主要研究内容 3 2 锁