《第10章VHDL基本语句.pptVIP

* 10.1 顺序语句 10.1.7 WAIT语句 【例10-12】 PROCESS BEGIN rst_loop : LOOP WAIT UNTIL clock =1 AND clock’EVENT; -- 等待时钟信号 NEXT rst_loop WHEN (rst=1); -- 检测复位信号rst x = a ; -- 无复位信号，执行赋值操作 WAIT UNTIL clock =1 AND clock’EVENT; -- 等待时钟信号 NEXT rst_loop When (rst=1); -- 检测复位信号rst y = b ; -- 无复位信号，执行赋值操作 END LOOP rst_loop ; END PROCESS; Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. * 【例10-13】 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; ENTITY shifter IS PORT ( data : IN STD_LOGIC_VECTOR (7 DOWNTO 0); shift_left: IN STD_LOGIC; shift_right: IN STD_LOGIC; clk: IN STD_LOGIC; reset : IN STD_LOGIC; mode : IN STD_LOGIC_VECTOR (1 DOWNTO 0); qout : BUFFER STD_LOGIC_VECTOR (7 DOWNTO 0) ); END shifter; ARCHITECTURE behave OF shifter IS SIGNAL enable: STD_LOGIC; BEGIN Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. * BEGIN PROCESS BEGIN WAIT UNTIL (RISING_EDGE(clk) ); --等待时钟上升沿 IF (reset = 1) THEN qout = ELSE CASE mode IS WHEN 01 = qout=shift_right qout(7 DOWNTO 1);--右移 WHEN 10 = qout=qout(6 DOWNTO 0) shift_left; --左移 WHEN 11 = qout = data; -- 并行加载 WHEN OTHERS = NULL; END CASE; END IF; END PROCESS; END behave; Evaluation only. Created with Aspose.Slides for .NET 3.5 Client Profile 5.2.0.0. Copyright 2004-2011 Aspose Pty Ltd. * 10.1 顺序语句 10.1.9 RETURN语句 RETURN; -- 用于过程 RETURN 表达式； -- 用于函数，有返回值 【例10-16】 PROCEDURE rs (SIGNAL s , r : IN STD_LOGIC ; SIGNAL q , nq : INOUT STD_LOGIC) IS BEGIN IF ( s =1 AND r =1) THEN REPORT Forbidden state : s and r are quual to 1; RETURN ; ELSE q = s AND nq AFTER 5 ns ; nq = s AND q AFTER 5 ns ; END IF ; END PROCEDURE rs ; Evaluati