FIR数字高通滤波器的FPGA实现概念.docVIP

摘 要 对于现代社会领域，数字信号处理（digital signal processing ，DSP）技术正在以很迅速的步伐往前发展，大家知道，数字信号处理中灵活性和实时性是最基本的要求，但在以往的模拟滤波器技术中，总是有着各种问题，让滤波效果达不到较为理想的要求。而数字滤波器随着数字信号解决水平的发展而渐渐的被进步采用，并且因为它在设计上的灵活性等优势在滤波上被许多地方当做首选方式，已经渐渐地替代了以往的过滤器。其中，有限长单位冲击响应（Finite Impulse Response，FIR）滤波器，因为它进行设计幅频时，具有良好的线性相位，以及稳定的系统等特性在数字信处理的项目里扮演了举足轻重角色。 这次使用现场可编程门阵列Field－Programmable Gate Array Abstract In the technical field of modern society, the digital signal processing technology has been developed rapidly. As we all know, the basic requirements of the digital signal processing are flexibility and topicality . However, the former filter technology always had many problems which made the filtering effect hard to achieve the ideal aims. With the development of digital signal processing technology, the digital filter has made great progress and been utilized. What’s more, it, as the preferred way has been used in many places because of its flexibility .So it has gradually displaced the previous filter. Among them, FIR digital filter plays a vital role because of it’s well linear phrase、stable systems and many other advantages in designing the frequency amplitudes. In this paper, I have designed a FIR digital high- pass filter by using FPGA and MATLAB/DSP Builder. With the window function method and equality ripple approach method, I first have analyzed and determined the relative parameters of the filter and design proposals. Then I made the 17-order FIR digital high-pass filter’s sampling frequency in 48KHZ、cutoff frequency in 10.8KHZ and data width in 8-bit by using DSP Bulider. By establishing model files in Matlab/Simulink, I used the filter module in the library tool and linked them into the principle chart .Later I set up and input those parameters into site to analogue simulation. I translated the Signal Compiler into the VHDL and other files and compiled in Quartus II and downloaded to FPGA. At last, I used the Signal Tap II to validate the result.