电子科技大学“数字逻辑设计及应用”数字逻辑4-5.pptVIP

* * Chapter 4 Combinational logic design principles Design by function unit Exclusive-OR gate : XOR Exclusive-OR gates Operation properties: (a) XOR (b) XNOR Exclusive-OR gates Exclusive-OR gates Exclusive-OR gates Minimal sum: 11 XOR: 6 Minimal sum: 31 XOR: 9 Parity code generating and checking Parity circuits Converter for signed number Converter for Gray code Comparator Parallel structure cascade structure Use the same cell for design Comparator Magnitude comparator Magnitude comparator Iterative unit and n-bit comparator Equal or diff ? Compare w