电子科技大学“数字逻辑设计及应用”数字逻辑8-3.pptVIP

* * Chapter 8 Sequential logic design practices Shift register Shift register Shifting the stored data to the next flip-flop Applications: Delay line Shift register Applications: Sequential signal detector Test chain in ASIC S/P signal convertor Data may be reused Sequential signal detector Data not be reused Sequential signal detector Test chain in ASIC Test chain in ASIC Series/parallel signal convertor S/P : 1 series to parallel 0 parallel to series Series/parallel signal convertor MSI shift register 8 bit shift register S in, P out; Input A and B. 8 bit sh