硕士算法2010_第7章并行计算基础绪论.ppt

* * Shared memory. Distributed memory. Virtual shared memory * Synchronously:同步地 单指令多数据流)能够复制多个操作数，并把它们打包在大型寄存器的一组指令集。 操作数是汇编语言指令的一个字段。 * Via：通过 Explicit：明确的 * Circuitry：电路 * Synchronized：同步 * vice versa：反之亦然 Concurrent:并发 CRCW存在是因为存储中存在BANK，可以支持同时写而不会相互影响； CREW正确而CRCW不一定正确是因为系统中不一定支持互斥同步。 * 算法设计与分析 李洪伟 博士 电子科技大学计算机科学与工程学院 hongweili@ /teacher/teacher.aspx?id=298 * 第7章 并行计算基础 并行计算机 并行计算机体系结构 并行计算机存储模型 多处理器中高速缓存一致性问题 并行计算机通信机制 静态网络 动态网络 并行计算机的消息传递方式 互连网络的路由选择 并行计算模型 PRAM模型 Goals of Parallel Computing Serial computing : One processor executes a series of instructions to produce a result. Parallel computing : Produce the same result using multiple processors. In practice performance depends on the manner in which the problem is divided between the processors. Ideally want a program running on P processors to execute P times faster. Want each processor to perform a similar amount of work, i.e., ensure load balancing. * * 并行计算机体系结构变化趋势 * Classification of Parallel Architectures * SIMD Architecture Single Instruction Multiple Data. Each processor has its own memory where it keeps its data. Every processor synchronously executes same instructions on its local data. Instructions issued by controller. Processors can communicate with each other. e.g. DAP, CM200 * * MIMD Architecture Multiple Instruction Multiple Data Several independent processors capable of executing separate programs. Further subdivision on relationship between processors and memory. Shared memory. Distributed memory. Virtual shared memory * Shared Memory Small number of processors which each have access to a global memory store. Communications via write/reads to memory. Simple to program (no explicit communications). Poor scaling due to memory access bottleneck. Distributed Memory Each processor has its own local memory. Processors connected via some interconnect mechanism. Processors communicate via explicit message passing. Local memory access quicker than remote memory access