2改进的BP译码算法-电测与仪表.doc

电力线通信中LDPC译码器的优化设计与实现* 章谦骅，章坚武 （杭州电子科技大学通信工程学院，杭州 310018） 摘要：电力线信道的噪声干扰很强，严重影响通信系统性能。本文提出了一种适于电力线通信中LDPC码的译码器硬件结构优化方法，并通过FPGA设计实现。算法的修正过程只包含简单的算术和逻辑运算，便于FPGA实现。本文方案提供的结构与常用的部分并行译码结构相比，节省了大量硬件资源。经软硬件仿真验证，硬件BP实现结构性能接近浮点BP算法，能应用于电力线通信等信噪比较低的传输领域。 关键词：电力线信道；LDPC码；FPGA；并行译码结构；BP算法 中图分类号：TP31 文献标识码：B 文章编号：1001-1390（2014）00-0000-00 Optimized Decoder Design and Implement LDPC Codes in Power Line Communications ZHANG Qian-hua, ZHANG Jian-wu (College of Communication Engineering, Hangzhou Dianzi University, Hangzhou 310018, China) Abstract：In a broadband low voltage power line channel, the interference from channel noise is so heavy that the communication performance will be seriously affected. This paper presented a optimization method of the decoder’s hardware structure which could be applied to the LDPC code in the power line communication system and could be implemented through the design of FPGA. The correction process of this algorithm just included simple arithmetic and logic operations, which was easy to implement by FPGA. Experiments proved that the structure provided by this paper could save much hardware resources, compared with some usual parallel decode structures. The software and hardware simulations showed that the implementation performance of the proposed scheme approached that of the floating-point BP algorithm . Therefore, the design can be widely used in such fields with low signal-to-noise ratio transmission as power line communications. Key words：power line channel, LDPC, FPGA, parallel decode structure, BP algorithm 0 引 言( 随着物联网技术的蓬勃发展，使得通信方式的创新成为目前国内通信行业的研究热点。电力线通信具有成本低、覆盖广等优点，使其成为智慧家居、智慧城市的接入技术中最具潜力的方案之一[1]。 电力线通信系统目前仍存在许多问题，其中噪声会严重影响通信质量，目前尚待解决。量脉冲噪声是影响电力线通信的一个重要因素，其幅度大、频谱宽、突发性强，使接收机无法正常接收。电力线通信噪声的抑制方法主要集中在信道噪声的抑制，如迭代消噪方法[2]，限幅置零消噪方法[3]等。 低密度奇偶校验（Low Density Parity Check, LDPC）码是一种性能优异的差错控制码[4]，其性能优异，具有良好的应用前景广阔。目前国内也有不少学者在研究电力线通信中的LDPC码译码算法优化[5]。其中，文献[6]从改进分层和积译码算法的角度对译码算法进行优化，文献[7]根据信道差异修正译码算法。但大多数算法都