- 1、本文档共44页,可阅读全部内容。
- 2、原创力文档(book118)网站文档一经付费(服务费),不意味着购买了该文档的版权,仅供个人/单位学习、研究之用,不得用于商业用途,未经授权,严禁复制、发行、汇编、翻译或者网络传播等,侵权必究。
- 3、本站所有内容均由合作方或网友上传,本站不对文档的完整性、权威性及其观点立场正确性做任何保证或承诺!文档内容仅供研究参考,付费前请自行鉴别。如您付费,意味着您自己接受本站规则且自行承担风险,本站不退款、不进行额外附加服务;查看《如何避免下载的几个坑》。如果您已付费下载过本站文档,您可以点击 这里二次下载。
- 4、如文档侵犯商业秘密、侵犯著作权、侵犯人身权等,请点击“版权申诉”(推荐),也可以打举报电话:400-050-0827(电话支持时间:9:00-18:30)。
查看更多
008-Timer Module(ECT)
Motorola HCS12 Enhanced Capture Timer Module HCS12 “A” Family 8-channel ECT implemented on all HCS12 ‘A’ family parts. ‘A’ family almost identical to ‘D’ family (no CAN/no J1850 on ‘A’). ECT Hardware Overview One 16-bit master up-counter with programmable prescaler. One 16-bit modulus down-counter, again with programmable prescaler. Eight independent timer channels, each capable of input capture and output compare functions. Four 8-bit pulse accumulators which may alternatively be configured as two 16-bit pulse accumulators. A number of programmable registers to provide detailed configuration of device function. Features TIMER STRUCTURE Timer, Prescaler and Counter TIMER OPERATION Timer Overflow Interrupt Output Compare Function Output Compare, OC7-OC0 (1 of 4) Output Compare(2 of 4) Force Output Compare (3 of 4) Output Compare, OC7-OC0 (4 of 4) Output Compare, OC7 (1 of 2) Output Compare 7 (2 of 2) Output Compare 7 Flow Chart Output Compare Flow Chart (Complete) Timer Toggle on Overflow Timer Output Compare Exercise Input Capture Function Input Capture, IC7-IC0(1 of 3) Input Capture, IC7-IC0 (2 of 3) Input Capture, IC7-IC0 (3 of 3) Input Capture Flow Chart IC/OC Select Timer Input Capture Lab Pulse Accumulator Pulse Accumulator Event Counter Mode Pulse accumulator is an event counter. An event is a prescribed external pulse applied to the relative MCU pin. Each pulse increments the value of the pulse accumulator register. Trigger event can be configured as a rising or a falling edge. Gated Accumulation Mode Pulse accumulator is an event length counter. Counter records the length of a pulse applied on the relative MCU pin. The MCU internal bus clock is divided by 64 and applied to the pulse accumulator for the duration of the external event. Trigger event is configurable as a logic high event or a logic low event. Pulse Accumulator Block Diagram PA Registers (1 of 2) PA Registers (2 of 2) Pulse Accumulator Pulse Accumulator Modes ECT La
您可能关注的文档
- !CISP复习大纲交流.ppt
- , Cancer regression in patients after transfer of genetically engineered lymphocytes.ppt
- (湖南卷)2010年高考试题-英语(有答案).doc
- 01.Android自动化测试(基础篇).pptx
- 06-自下而上的语法分析.ppt
- 06转变松弛_新12.ppt
- 1 香港爱护动物协会介绍.ppt
- 08-1st-thirst.ppt
- 106975__罗密欧与朱丽叶__卞建容.ppt
- 05第4讲Chaucer.ppt
- 重庆新速达物业服务集团股份凯里公司招聘笔试题库2024.pdf
- 浙江杭州千岛湖泰众肉类食品有限公司招聘笔试题库2024.pdf
- 陕西新华出版传媒集团新华书店分公司招聘笔试题库2024.pdf
- 宁夏海原县肉牛产业发展集团有限公司招聘笔试题库2024.pdf
- 浙江温岭市化工轻工建筑材料有限公司招聘笔试题库2024.pdf
- 中航飞机汉中航空零组件制造有限公司招聘笔试题库2024.pdf
- 山东海阳市海昇矿产资源开发有限公司招聘笔试题库2024.pdf
- 山东潍坊寿光市公共交通运输有限公司招聘笔试题库2024.pdf
- 内蒙古察右前旗农业投资开发有限公司招聘笔试题库2024.pdf
- 线上清明祭英烈活动策划.pptx
文档评论(0)