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Multi-threadedGeant4ontheXeon-.PDF
Multi-threaded Geant4 on the Xeon-Phi with
Complex High-Energy Physics Geometry
Steven Farrell, Andrea Dotti, Makoto Asai, Paolo Calafiura, Romain Monnard
6 Abstract—To study the performance of multi-threaded Geant4 applications. The current generation, known as Knights Corner
1 for high-energy physics experiments, an application has been (KNC), is a coprocessor chip that functions alongside a tradi-
0 developed which generalizes and extends previous work. A tional CPU and supports both offload and native programming
2 highly-complex detector geometry is used for benchmarking on models. It has more than 50 cores with 512-bit advanced vector
an Intel Xeon Phi coprocessor. In addition, an implementation
y of parallel I/O based on Intel SCIF and ROOT technologies is instructions (AVX) running a simplified Linux OS.
a incorporated and studied. The KNC coprocessor doesn’t have a hard disk and has
M a limited amount of RAM (6-16 GB). A performant com-
I. INTRODUCTION munication mechanism between host and coprocessor is thus
6
essential for applications that produce a significant amount of
2 N the midst of the multi-core era, the computing models
Iemployed by high-energy-physics (HEP) experiments must output. The Intel Symmetric Communications Interface (SCIF)
] library serves this purpose, providing high-performance direct
h evolve to embrace the trends of the
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