KAD5512HP-25Q72;KAD5512HP-12Q48;KAD5512HP-12Q72;KAD5512HP-17Q48;中文规格书,Datasheet资料.pdfVIP

KAD5512HP ® Data Sheet October 1, 2009 FN6808.3 High Performance 12-Bit, Features 250/210/170/125MSPS ADC • Pin-Compatible with the KAD5512P Family, Offering The KAD5512HP is the high-performance member of the 2.2dB Higher SNR KAD5512 family of 12-bit analog-to-digital converters. • Programmable Gain, Offset and Skew control Designed with Intersil’s proprietary FemtoCharge™ technology on a standard CMOS process, the family supports • 950MHz Analog Input Bandwidth sampling rates of up to 250MSPS. The KAD5512HP is part of • 60fs Clock Jitter a pin-compatible portfolio of 10, 12 and 14-bit A/Ds with • Over-Range Indicator sample rates ranging from 125MSPS to 500MSPS. • Selectable Clock Divider: ÷ 1, ÷2 or ÷4 A serial peripheral interface (SPI) port allows for extensive configurability, as well as fine control of various parameters • Clock Phase Selection such as gain and offset. • Nap and Sleep Modes Digital output data is presented in selectable LVDS or CMOS • Two’s Complement, Gray Code or Binary Data Format formats. The KAD5512HP is available in 72- and 48-contact QFN packages with an exposed paddle. Operating from a • DDR LVDS-Compatib