TMS3202833x Multichannel Buffered Serial Port (McBSP) Reference Guide第六章英文.docVIP

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TMS3202833x Multichannel Buffered Serial Port (McBSP) Reference Guide第六章英文.doc

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TMS3202833x Multichannel Buffered Serial Port (McBSP) Reference Guide第六章英文

SPI Operation Using the Clock Stop Mode This chapter explains how to use the McBSP in SPI mode. 6.1 SPI Protocol ............................................................................. 60 6.2 Clock Stop Mode....................................................................... 60 6.3 Bits Used to Enable and Configure the Clock Stop Mode............... 60 6.4 Clock Stop Mode Timing Diagrams ............................................. 61 6.5 Procedure for Configuring a McBSP for SPI Operation .................. 63 6.6 McBSP as the SPI Master........................................................... 63 6.7 McBSP as an SPI Slave.............................................................. 65 6.1 SPI Protocol The SPI protocol is a master-slave configuration with one master device and one or more slave devices. The interface consists of the following four signals: 1、Serial data input (also referred to as master in/slave out, or MISO) 2、Serial data output (also referred to as master out/slave in, or MOSI) 3、Shift-clock (also referred to as SCK) 4、Slave-enable signal (also referred to as SS) A typical SPI interface with a single slave device is shown in Figure 6-1. Figure 6-1. Typical SPI Interface The master device controls the flow of communication by providing shift-clock and slave-enable signals. The slave-enable signal is an optional active-low signal that enables the serial data input and output of the slave device (device not sending out the clock). In the absence of a dedicated slave-enable signal, communication between the master and slave is determined by the presence or absence of an active shift-clock. When the McBSP is operating in SPI master mode and the SS signal is not used by the slave SPI port, the slave device must remain enabled at all times, and multiple slaves cannot be used. 6.2 Clock Stop Mode The clock stop mode of the McBSP provides compatibility with the SPI protocol. When the McBSP is configured in clock stop mode, t