error immune logic for low-power probabilistic computing免疫低功耗逻辑错误概率计算.pdfVIP

Hindawi Publishing Corporation VLSI Design Volume 2010, Article ID 460312, 9 pages doi:10.1155/2010/460312 Research Article Error Immune Logic for Low-Power Probabilistic Computing Bo Marr, Jason George, Brian Degnan, David V. Anderson, and Paul Hasler School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA Correspondence should be addressed to Bo Marr, marr.bo@ Received 27 May 2009; Accepted 19 November 2009 Academic Editor: Gregory D. Peterson Copyright © 2010 Bo Marr