嵌入广义折叠技术的集成电路测试数据压缩方案-计算机辅助设计与.pdfVIP

第29 卷 第 8 期 计算机辅助设计与图形学学报 Vol. 29 No.8 2017 年8 月 Journal of Computer-Aided Design Computer Graphics Aug. 2017 嵌入广义折叠技术的集成电路测试数据压缩方案 詹文法, 吴 琼, 程一飞, 吴海峰 (安庆师范大学计算机与信息学院 安庆 246133) (zhanwf@) : 针对芯片测试过程中自动测试设备需要传输大量测试数据到被测芯片, 浪费了大量的测试数据传输时间的 问题, 提出一种广义折叠技术的集成电路测试数据压缩方案. 首先构建有向图, 将完全测试集映射到有向图中; 其 次查找有向图中最长路径, 将完全测试集分割成若干个广义折叠集; 最后存储广义折叠集的种子和广义折叠距离. 另外, 提出了广义折叠集的解压结构. 理论上可以将整个测试集的存储转化成若干个广义折叠种子和广义折叠距离 的存储. 对部分 ISCAS89 标准电路中规模较大的时序电路进行实验的结果表明, 在同样实验环境下, 该方案在压缩 效果方面优于Golomb 码、FDR 码、EFDR 码和折叠集等成熟的压缩方法. ：内建自测试; 折叠集; 测试数据压缩; 外建自测试; 编码 ：TP391.41 Integrated Circuit Test Data Compression Scheme Built-in Generalized Folding Technology Zhan Wenfa, Wu Qiong, Cheng Yifei, and Wu Haifeng (School of Computer Information, Anqing Normal University, Anqing 246133) Abstract: Due to the automatic test equipment in the process of chip need to transmit a large number of test data to the tested chip, resulting in wasting a lot of test data transmission time, an integrated circuit test data compres- sion scheme based on generalized folding technology is proposed. First, construct a directed graph, complete test set are mapped to the directed graph; Second, the complete test set is divided into several generalized folding set by find the longest paths; Finally, store the generalized folding set seeds and generalized folding distance. In ad- dition, the decompression structure of generalized folding set is proposed. In theory, the storage of the whole test set can be the storage of some generalized folding seeds and distance. Experimental results on part of the ISCAS89 benchmark circuits show that, under the same experimental conditions the com