ADI ADP7185低压降LDO线性稳压器解决方案.docxVIP

ADI ADP7185低压降(LDO)线性稳压器解决方案时间：2017-07-18 09:58:53?????? 来源：中电网ADI公司的ADP7185是CMOS低压降(LDO)线性稳压器,工作电压从-2.0V到-5.5V,提供高达-500mA输出电流,固定输出电压从-0.5V到-4.5V,可调输出电压从-0.5V到VIN+0.5V, 100 Hz - 100 kHz输出噪音4 μVrms, 10 kHz - 1 MHz噪音频谱密度20 nV/√Hz,在-500A负载时的压降为-190mV,主要用在对噪音要求高的稳压应用如ADC,DAC,精密放大器,通信和基础设备,医疗和健康设备以及工业和仪表.本文介绍了ADP7185主要特性,固定输出和可调输出内部框图,应用电路以及ADP7183和ADP7185评估板主要特性,电路图,材料清单和PCB设计图.The ADP7185 is a complementary metal oxide?semiconductor (CMOS), low dropout (LDO) linear regulator that operates from ?2.0 V to ?5.5 V and provides up to ?500 mA of output current. This high output current LDO is ideal for regulation of high performance analog and mixed signal circuits operating from ?0.5 V down to ?4.5 V. Using an advanced proprietary architecture, the ADP7185 provides high power supple rejection ratio (PSRR) and low noise, and it achieves excellent line and load transient response with a small 4.7 μF ceramic output capacitor. The ADP7185 is available in 15 fixed output voltage options. The following voltages are available from stock: ?0.5 V, ?1.0 V, ?1.2 V, ?1.5 V, ?1.8 V, ?2.0 V, ?2.5 V, ?3.0 V, and ?3.3 V. Additional voltages available by special order are ?0.8 V, ?0.9 V, ?1.3 V, ?2.8 V, ?4.2 V, and ?4.5 V. An adjustable version is also available which allows output voltages that range from ?0.5 V to ?VIN + 0.5 V with an external feedback divider. The?enable?logic feature is capable of interfacing with positive or negative logic levels for maximum flexibility. The ADP7185 regulator output noise is 4 μVrms independent of the output voltage. The ADP7185 is available in an 8-lead, 2 mm × 2 mm LFCSP, making it not only a very compact solution but also providing excellent thermal performance for applications requiring up to ?500 mA of output current in a small, low profile footprint.ADP7185主要特性:Input voltage range: ?2.0 V to ?5.5 V?Maximum output current: ?500 mA?Fixed output voltage options: ?0.5 V to ?4.5 V?Adjustable output from ?0.5 V to ?VIN + 0.5 V?Low output noise: 4 μVrms