SN74LVC53APW(表贴三态输出八D锁存器).pdfVIP

SN54LVC573A, SN74LVC573A OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS SCAS300I – JANUARY 1993 – REVISED JUNE 1998
EPIC (Enhanced-Performance Implanted SN54LVC573A . . . J OR W PACKAGE CMOS) Submicron Process SN74LVC573A . . . DB, DW, OR PW PACKAGE (TOP VIEW)
Typical VOLP (Output Ground Bounce) 0.8 V at VCC = 3.3 V, TA = 25°C OE 1 20 VCC
Typical VOHV (Output VOH Undershoot) 1D 2 19 1Q 2 V at VCC = 3.3 V, TA = 25°C 2D 3 18 2Q
Support Mixed-Mode Signal Operation on 3D 4 17 3Q All Ports (5-V Input/Output Voltage With 4D 5 16 4Q 3.3-V VCC) 5D 6 15 5Q 6D 7 14 6Q
Power Off Disables Outputs, Permitting 7D 8 13 7Q Live Insertion 8D 9 12 8Q
ESD Protection Exceeds 20