开关原理,损耗计算.pdf

Application Report SLPA009A–June 2011–Revised July 2011 Power Loss Calculation With Common Source Inductance Consideration for Synchronous Buck Converters David Jauregui, Bo Wang, and Rengang Chen PMP - Power Stage ABSTRACT The synchronous buck converter is a widely used topology in low-voltage, high-current applications. Low-power loss and highly efficient synchronous buck converters are in great demand for advanced microprocessors of the future. Good understanding of power losses in a synchronous buck converter is critical for improving converter performance. Common source inductance (CSI) is the inductance shared by the main current path and the gate driver loop in a converter and carries the drain-source current and the gate-charging current. A high-side (HS) FET CSI has significant impact on converter performance, especially switching power loss: the greater the HS CSI, the greater the switching loss. This application report analyzes MOSFET-related power losses in a synchronous buck converter. The effects of HS CSI are also discussed and quantified. This document introduces the Texas Instruments NexFET™ Power Block, which uses advanced device and package techniques to minimize CSI and thus reduce system power loss. To simply design efforts, a complementary design calculator (SLPC015) is available. Contents 1 Introduction 2