高精度音频多位sigma-delta调制器设计-中南大学学报.pdfVIP

41 2 () Vol.41 No.2 2010 4 Journal of Central South University (Science and Technology) Apr. 2010 sigma-delta 1, 2 1 1 1 1 2 (1. 710071 2. 710106) 4 sigma-delta DAC sigma-delta CLA(Clocked averaging algorithm)DAC 24 kHz(OSR)128 0.5 µm CMOS 5 V20 kHz (SNR) 103 dB102 dB87 mW2.56 mm2 sigma-delta TN432 A 1672−7207(2010)02−0592−08 Design of high-resolution audio multibit sigma-delta modulator 1, 2 1 1 1 1 2 SHI Li-chun , YANG Yin-tang , LI Di , WU Xiao-feng , DING Rui-xue , LIANG Hong-jun (1. Key Laboratory of Wide Band-Gap Semiconductor Materials and Devices, Ministry of Education, School of Microelectronics, Xidian University, Xi’an 710071, China; 2. Base Department, Xi’an Communication Institute, Xi’an, 710106, China) Abstract: A two-level single-loop multi-bit sigma-delta modulator was designed with a 4-bit quantizer inside, and it was used for digital audio applications. The modulator used multibit quantization and the dynamic element matching (DEM) technology was adopted to reduce the nonlinearity introduced by multibit quantizer. The modulator was fabricated in a 0.5 µm CMOS process and 5 V supply voltage, and the input signal bandwidth was 24 kHz at oversampling rate (OSR) of 128. The results show that when a signal of 20 kHz is input, the modulator can achieve a ratio of signal and noise of 103 dB and SFDR of 102 dB. The whole modulator dissipates 87 mW, and the total area of the die is 2.56 mm2 . Key words: sigma-delta modulator; switched-capacitor integrator; high-resolution; multibit sigma-delta( Σ∆) ( sigma-delta de