微波电子电路2.pdfVIP

Fall 2005 6.012 Microelectronic Devices and Circuits Prof. J. A. del Alamo Homework #1 - September 9, 2005 Due: September 16, 2005 at recitation ( 2 PM latest) (late homework will not be accepted) Please write your recitation session time on your problem set solution. 1. [60 points] A Dynamic Random Access Memory (DRAM) chip is composed of many cells that hold individual bits of information. For example, a 4 MB DRAM has about 4 × 106 cells where information can be held. At the heart of one of these cells is a capacitor that stores electrical charge. If the capacitor is charged, then we say that a ”1” is stored. If the capacitor is discharged, then a ”0” is stored. The smaller the capacitor, the denser the memory chip can be made. Achieving denser DRAM chips has been for the better part of the last 30 years a powerful technology driver for microelectronics, bringing along with it staggering progress in microprocessors and many other microelectronic products. For a long time, the minimum feature size, or minimum dimension that can be reliably fab- ricated on a Si wafer, has been the bottleneck to high-density DRAM development. This is because the storage capacitor area is directly related to the minimum feature dimensions. As technology progressed and the minimum features size decreased, DRAM density increased. In the mid 90’s, however, the situation changed dramatically. Rather than feature size, dielectric breakdown became a limiting phenomenom. This problem explores these issues. This problem is designed to accomplish two goals: 1. to make you understand a few key issues in DRAM development: evolution, critical dimensions, limiting factors; 2. to make you review basic capacitor facts: charge, capacitance, field. To a reasonable good approximation, a DRAM capacitor is ba