M74HC563RM13TR,M74HC563RM13TR,M74HC563RM13TR,M74HC563B1R, 规格书,Datasheet 资料精选.pdfVIP

M74HC563 OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT INVERTING HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) DIP SOP TSSOP SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL ORDER CODES WIDE OPERATING VOLTAGE RANGE: PACKAGE TUBE T R VCC (OPR) = 2V to 6V DIP M74HC563B1R PIN AND FUNCTION COMPATIBLE WITH SOP M74HC563M1R M74HC563RM13TR 74 SERIES 563 TSSOP M74HC563TTR DESCRIPTION While the OE input is at low level, the eight outputs The M74HC563 is an high speed CMOS OCTAL will be in a normal logic state (high or low logic LATCH WITH 3-STATE OUTPUTS fabricated level) and while OE is in high level the outputs will with silicon gate C2MOS technology. be in a high impedance state. This 8-BIT D-Type latches is controlled by a latch The 3-State output configuration and the wide enable input (LE) and output enable input (OE). choice of outline make bus organized system While the LE input is held at a high level, the Q simple. outputs will follow the data input inversely. When All inputs are equipped with protection circuits the LE is taken, the Q outputs will be latched against static discharge and transient