LNCS Cryptonite – A Programmable Crypto Processor…可编程加密处理器.pdfVIP

Cryptonite – A Programmable Crypto Processor Architecture for High-Bandwidth Applications Rainer Buchty , Nevin Heintze, and Dino Oliva Agere Systems 101 Crawfords Corner Rd Holmdel, NJ 07733, USA {buchty|nch|oliva}@ Abstract. Cryptographic methods are widely used within networking and digital rights management. Numerous algorithms exist, e.g. spanning VPNs or distribut- ing sensitive data over a shared network infrastructure. While these algorithms can be run with moderate performance on general purpose processors, such pro- cessors do not meet typical embedded systems requirements (e.g. area, cost and power consumption). Instead, specialized cores dedicated to one or a combination of algorithms are typically used. These cores provide very high bandwidth data transmission and meet the needs of embedded systems. However, with such cores changing the algorithm is not possible without replacing the hardware. This paper describes a fully programmable processor architecture which has been tailored for the needs of a spectrum of cryptographic algorithms and has been explicitly designed to run at high clock rates while maintaining a significantly better perfor- mance/area/power tradeoff than general purpose processors. Both the architecture and instruction set have been developed to achieve a bits-per-clock rate of greater than one, even with complex algorithms. This performance will be demonstrated with standard cryptographic algorithms (AES and DES) and a widely used hash algorithm (MD5). 1 Introduction and Motivation Hardware ASIC blocks are still the only available commercial