官方说明书ON SEMICONDUCTOR MC100EP16VC Data Sheet.pdfVIP

The EP16VC is a differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with high gain and enable output. The EP16VC provides an EN input which is synchronized with the data input (D) signal in a way that provides glitchless gating of the MARKING DIAGRAMS* QHG and QHG outputs. When the EN signal is LOW, the input is passed to the outputs and 8 the data output equals the data input. When the data input is HIGH and 8 EN goes HIGH, it will force the QHG LOW and the QHG HIGH on the 1 KEP66 next negative transition of the data input. If the data input is LOW SO−8 ALYW when the EN goes HIGH, the next data transition to a HIGH is ignored D SUFFIX and QHG remains LOW and QHG remains HIGH. The next positive CASE 751 1 transition of the data input is not passed on to the data outputs under these conditions. The QHG and QHG outputs remain in their disabled 8 state as long as the EN input is held HIGH. The EN input has no 8 influence on the Q output and the data input is passed on (inverted) to 1 KP66 this output whether EN is HIGH or LOW. This configuration is ideal TSSOP−8 ALYW for crystal oscillator applications where the oscillator can be free DT SUFFIX 1 running and gated on and off synchronously without adding extra CASE 948R counts to the output. The VBB/D pin is internally dedicated and available for