AEC_Q100_Rev_G__Image_Marked资料.pdf

AEC - Q100 - Rev-G May 14, 2007 FAILURE MECHANISM BASED STRESS TEST QUALIFICATION FOR INTEGRATED CIRCUITS Automotive Electronics Council Component Technical Committee AEC - Q100 - REV-G May 14, 2007 Automotive Electronics Council Component Technical Committee TABLE OF CONTENTS AEC-Q100 Failure Mechanism Based Stress Test Qualification for Integrated Circuits Appendix 1: Definition of a Qualification Family Appendix 2: Q100 Certification of Design, Construction and Qualification Appendix 3: Plastic Package Opening for W ire Bond Testing Appendix 4: Minimum Requirements for Qualification Plans and Results Appendix 5: Part Design Criteria to Determine Need for EMC Testing Appendix 6: Part Design Criteria to Determine Need for SER Testing Attachments AEC-Q100-001: WIRE BOND SHEAR TEST AEC-Q100-002: HUMAN BODY MODEL (HBM) ELECTROSTATIC DISCHARGE (ESD) TEST AEC-Q100-003: MACHINE MODEL (MM) ELECTROSTATIC DISCHARGE (ESD) TEST AEC-Q100-004: IC LATCH-UP TEST AEC-Q100-005: NONVOLATILE MEMORY WRITE/ERASE ENDURANCE, DATA RETENTION, AND OPERATIONAL LIFE TEST AEC-Q100-006: ELECTRO-THERMALLY INDUCED PARASITIC GATE LEAKAGE (GL) TEST AEC-Q100-007: FAULT SIMULATION AND TEST GRADING AEC-Q100-008: EARLY LIFE FAILURE RATE (ELFR) AEC-Q100-009: ELECTRICAL DISTRIBUTION ASSESSMENT AEC-Q100-010: SOLDER BALL SHEAR TEST AEC-Q100-011: CHARGED DEVICE MODEL (CDM) ELECTROSTATIC DISCHARGE (ESD) TEST AEC-Q100-012: SHORT CIRCUIT RELIABILITY CHARACTERIZATION OF SMART POWER DEVICES FOR 12V SYSTEMS