姜书艳 数字逻辑设计及应用 7知识课件.pptVIP

Chapter 3 Digital Circuits (数字电路);CMOS Steady-State Electrical Behavior ( CMOS稳态电气特性） Logic Levels （逻辑电压电平） Noise Margin （噪声容限）;Review of Chapter 3;Digital Logic Design and Application (数字逻辑设计及应用);Review of Chapter 3;Review of Chapter 3;3.10.3 Transistor-Transistor Logic (晶体管－晶体管逻辑);Additional TTL Gate Types ( 其它TTL电路 ) Tri-State output, Open-Collector Gate ( 三态输出、集电极开路OC门 ) NOR Gate, Non-inverter ( 或非门、非反相门 );A;Push-Pull Output 推拉式输出;Digital Logic Design and Application (数字逻辑设计及应用);Digital Logic Design and Application (数字逻辑设计及应用);Digital Logic Design and Application (数字逻辑设计及应用)