基于FPGA的数字上变频设计毕业设计(论文)说明书.doc

毕业设计(论文)说明书 题 目： 基于FPGA的数字上变频设计 院 （系）： 信息与通信学院 √ 题目类型： 理论研究 实验研究 工程设计 工程技术研究 软件开发 √ 桂林电子科技大学毕业设计（论文）报告用纸 第 PAGE 4 页 共 4 页 摘 要 数字变频技术在软件无线电和各类数字化发射接收机中得到了广泛应用。由于数字信号处理器（DSP）的处理速度有限，往往难以对A/D采样得到的高速率数字信号直接进行各种类别的实时处理。为了解决这一矛盾，需要采用数字变频技术，将采样得到的高速率信号变成低速率基带信号，以便进行下一步的信号处理。用现场可编程阵列(FPGA)来设计数字上下变频器有许多好处。FPGA在硬件上具有很强的稳定性和极高的运算速度，在软件上具有可编程的特点，在某些专用芯片不能完全满足系统技术指标的情况下，所以采用FPGA来设计数字下变频器更是一种好的解决方案。 本文基于数字上变频的基本原理，利用FPGA 器件的各种优势，在FPGA 开发工具Quartus II上完成了数字上变频的设计、综合，并最终在Modelsim上实现了仿真。首先介绍数字上变频及其各模块的原理和实现方法，然后再通过编写Verliog HDL语言及调用IP核来实现各个模块功能，最后通过原理图的构造来整体实现数字上变频。并通过Modelsim的仿真以验证数字上变频的正确性。 关键词：数字上变频；FPGA；插值；HB滤波器；CIC滤波器 Abstract Digital Frequency Conversion Technology in Software Defined Radio and various types of digital launch or receivers have been widely used. As the digital signal processor (DSP) processing speed is limited, often it is difficult for A / D sampling rate to be high-speed digital signal directly to the various categories of real-time processing. In order to resolve this contradiction, the need for digital up or down conversion technology, high-speed sampling rate of signals to be turned into a low rate of base-band signal for the next stage of signal processing. With field-programmable array (FPGA) to the design of digital down-converter has many advantages. FPGA hardware has strong stability and high computational speed, the software has programmable features, and in some special DDC chip technology can not completely meet the indicators, so the number of used FPGA to design the next converter is a good solution. Digital Up Converter Based on the basic principles of the use of the various advantages of FPGA devices, development tools in the FPGA on the Quartus II. DUC completed the design, integration, and ultimately the realization of the simulation in Modelsim. First introduced the principle of digital up conversion and of each module, and then Verliog HDL language b