lect16-电路缺陷专题讲座.ppt

* * * * * * * 16: Circuit Pitfalls * Bad Circuit 6 Circuit Domino AND gate Symptom Precharge gate while A = B = 0, so Z = 0 Set f = 1 A rises Z is observed to sometimes rise Principle: Charge Sharing If X was low, it shares charge with Y Solutions: Limit charge sharing Safe if CY CX Or precharge node X too 16: Circuit Pitfalls * Bad Circuit 7 Circuit Dynamic gate + latch Symptom Precharge gate while transmission gate latch is opaque Evaluate When latch becomes transparent, X falls Principle: Charge Sharing If Y was low, it shares charge with X Solution: Buffer dynamic nodes before driving transmission gate 16: Circuit Pitfalls * Bad Circuit 8 Circuit Latch Symptom Q changes while latch is opaque Especially if D comes from a far-away driver Principle: Diffusion Input Noise Sensitivity If D -Vt, transmission gate turns on Most likely because of power supply noise or coupling on D Solution: Buffer D locally 16: Circuit Pitfalls * Summary Static CMOS gates are very robust Will settle to correct value if you wait long enough Other circuits suffer from a variety of pitfalls Tradeoff between performance robustness Essential to check circuits for pitfalls For large chips, you need an automatic checker. Design rules aren’t worth the paper they are printed on unless you back them up with a tool. * * * * * * * * * * * * * * * * * * * * * * * * * * * * 16: Circuit Pitfalls CMOS VLSI Design CMOS VLSI Design 4th Ed. Lecture 16: Circuit Pitfalls 16: Circuit Pitfalls * Outline Variation Noise Budgets Reliability Circuit Pitfalls 16: Circuit Pitfalls * Variation Process Threshold Channel length Interconnect dimensions Environment Voltage Temperature Aging / Wearout 16: Circuit Pitfalls * Process Variation Threshold Voltage Depends on placement of dopants in channel Standard deviation inversely proportional to channel area Channel Length Systematic across-chip linewidth variation (ACLV) Random line edge roughness (LER) Interconnect Etching variations affect w,