段辉高10现代CMOS工艺基本流程.pptVIP

* Silicon Substrate P+ Silicon Epi Layer P- P- Well N- Well N+ Drain N+ Source P+ Drain P+ Source BPSG W Contact Plug Metal1 IMD1 IMD淀积 金属间绝缘体(IMD)淀积 未掺杂的SiO2 连续的CVD和刻蚀工艺，厚度约1um 填充在金属线之间，提供金属层之间的绝缘隔离 * Silicon Substrate P+ Silicon Epi Layer P- P- Well N- Well N+ Drain N+ Source P+ Drain P+ Source BPSG W Contact Plug Metal1 IMD1 IMD抛光 IMD抛光 CMP * Silicon Substrate P+ Silicon Epi Layer P- P- Well N- Well N+ Drain N+ Source P+ Drain P+ Source BPSG W Contact Plug Metal1 IMD1 Photoresist 光刻胶成形 光刻胶成形 用于定义通孔(Vias) * Silicon Substrate P+ Silicon Epi Layer P- P- Well N- Well N+ Drain N+ Source