2013年软院机组考试.docVIP

2013年软院机组考试 选择题 The second generation computers is ? Half adder,input is x、y, output is s , what is s? Seek time + rotational latency + transfer time is what? 电脑内存 is 8k words of 32-bit each,最小的 addressable memory unit is 8-bit bytes , 则内存地址需要多少bit？ 考取有关Opcode instruction address的点 考取有关hit rate 的点 考取有关control store 的点 判断溢出 Hazard的分类 RISC的特征 About pipelining，①hazard , ②branch penalty , ③implement pipeline In memory-mapped I/O system use _____ to differentiate memory (?) and I/O devices ？ In an interrupt process , the usage of saving PC The required control signals are determined by CICS: the conditional branch uses Relative addressing location:0x0100,offset 0x0010,what is the next instruction? 简答题 What is the difference between a subroutine and an interrupt service routine? Booth’s Algorithm X、How many bits will be need to store the product? 、How many addition and subtractions will be performed? 优缺点of hardwired and micro-programmed:control Point on the dependent instructions,Can we eliminate the data dependencies using forwarding if not ,what should we do? Draw a diagram to show the pipelined execution of the 4个命令 Add R3、R1、#100 Or R4、R5、R6 Load R2、（R3） Subtract R9、R2、#30 大题 两种 static memory chips :128k X 8 bit (total 4 chips) and 512k X 4bit (total 2 chips) implement a 512k X 16 bit memory ,draw the figure of the memory organization. 16-bit format scale factor: 6-bit , e-31 exponent 0 : 0 63:infinity Mantissa 9 bit ① -0.5625 ② +21 ③ Add A= 0100001 111111110 B=0011111 001010101 instruction length :10 bit,operand address :4 bit, need 3 two-address instructions, 15 one , 16 zero . How design instruction format Give the sequence of steps need to fetch and execute the instructions on 5-stage RISC SUB R1 R2 R3 (32bit operand) 5.Byte-addressable Virtual address space : 4Gb , Main memory size : 16Mb , Cache size : 256 kb , Page size : 64kb, MM to c 4 way set associative HD to MM: full assoc