基于F的PGA设计DDR接口注意事项.ppt

DDR/DDRIl Things to consider  Objectives This presentation covers aspects not addressed in DDR SDRAM Megawizard demonstration Aims to help answers questions like How many controllers can I get in this device at layout hat if i want to run below 10o or above 200 mhz Are there additional considerations for Hardcopy Where can I find more information Etc etc Unfortunately this does make the presentationbitty  What is dDR?(Brief) ( This section for those at the beginning of the learning curve  What iS DDR DDR stands for double data rate Generally when people talk about ddr they are talking about transferring data to and from memory. DDR simply means there is data on both edges f the strobe Data Strobe (dqs) Data(dq)  Why would i use it? vI your bandwidth for the same number of pins(compared to To increas And because it is cheap (commercial part used in PCs) Your customers use it look at the market share of ddr and ddr2 100320033034003100420043004400410052005 DDR2 SDRAM■ DDR SDRAM SDRAM■ FPM EDO DRAM■ ADRAM■ other  What is involved? Data passes backwards and forwards on a high speed bi-direction bus. a data strobe(DQs travels with the data Memory Controller DQ DDR2 DQ DQS Memory DQS On-Chip DLL Phase Shif for DQs Delay Circuitry Read Operation  What is involved The fpga must align the data and strobe dq and dqs)on the way out(writes) and delay the strobe (dgs) by 90 degrees on the way in(reads to use dgs as capture strobe The operation clearly involves going off chipso we need to be careful of timing analysis And it is or can be high speed so we need to watch out for things like termination  Where can I find more information (All: Rejoin presentation here)  What collateral already exits? The Memory solutions Webpage on the altera site Hardware boards demonstrations Many whitepaper and application notes on the website Core delivered with some whitepapers+FAQs  Memory solutions Centre /technology/memory/mem-i