数字电路教学课件：chapter3-4.pptVIP

if (IN9 == 1b0) Y = 4b0110; else if (IN8 == 1b0) Y = 4b0111; else if (IN7 == 1b0) Y = 4b1000; else if (IN6 == 1b0) Y = 4b1001; else if (IN5 == 1b0) Y = 4b1010; else if (IN4 == 1b0) Y = 4b1011; else if (IN3 == 1b0) Y = 4b1100; else if (IN2 == 1b0) Y = 4b1101; else if (IN1 == 1b0) Y = 4b1110; else if (IN0 == 1b0) Y = 4b1111; YN0 = Y[0]; YN1 = Y[1]; YN2 = Y[2]; YN3 = Y[3]; end endmodule module CT74138(A0,A1,A2,S1,S2N,S3N,YN0, YN1,YN2,YN3,YN4,YN5,YN6,YN7); input A0,A1,A2,S1,S2N,S3N; output YN0,YN1,YN2,YN3,YN4,YN5,YN6,YN7; reg YN0,YN1,YN2,YN3,YN4,YN5,YN6,YN7; reg[7:0