数字电路教学课件：Chapter4-6.pptVIP

Lecture Notes gsu@hust.edu.cn Relative Occurrences of Events e.g., Fig 5.76 @P285 Producing Timing Pulse based on counter 74xx393 Negative Edge Sensitive 4-bit Binary Counter Counting Up: 0000 0001 0010 …… 1101 1111 Sampled by Clock Edge Numbering Clock Pulse Counting Up Logic Diagram Step 1 Logic expression reduction Step 2 Draw the diagram(74xx393 plus basic gates) e.g., Pulse Duration MSI counter (b) Feedback to load: from (0000)2 to (1000)2 (c) Feedback to load：from (0111)2 to (1111)2 e.g., draw state diagram and calculate its modulo Shift register 1. ring counter 1. State