模拟CMOS集成电路设计课件2-2.IC Components.ppt

第*页 Examples of Capacitor Layout 第*页 Design Rules Geometrical constraints that guarantee the proper operation of a circuit implemented by a given CMOS process Necessary to avoid problems such as device misalignment, metal fracturing, lack of continuity, etc. Expressed in terms of minimum dimensions such as minimum values of Widths Seperations Extensions Overlaps Typically use a minimum feature dimension called “lambda”. Lambda is usually equal to the minimum channel length Minimum resolution of the design rules is typically half lambda In most processes, lambda can be scaled or reduced as the process matures 第*页 Geometrical considerations Design Rules for 2P2M NWELL Bulk CMOS Process 第*页 Geometrical considerations Design Rules for 2P2M NWELL Bulk CMOS Process 第*页 Geometrical considerations Design Rules for 2P2M NWELL Bulk CMOS Process (cont.) 第*页 Geometrical considerations Design Rules for 2P2M NWELL Bulk CMOS Process (cont.) 第*页 Geometrical considerations Design Rules for 2P2M NWELL Bulk CMOS Process (cont.) 第*页 Geometrical considerations Design Rules for 2P2M NWELL Bulk CMOS Process (cont.) 第*页 Geometrical considerations Design Rules for 2P2M NWELL Bulk CMOS Process (cont.) 第*页 Summary Process steps include: Oxide growth, Thermal diffusion, Ion implantation, Deposition, Etching, Epitaxy PN junctions are used to electrically isolate regions in CMOS A simple CMOS technology requires about 8 masks BiCMOS combines the best of both BJT and CMOS technologies Passive component compatible with CMOS technology include: Capacitors - MOS, poly-poly, metal-metal, etc. Resistors - Diffused, implanted, well, etc. CMOS technology has a reasonably good lateral BJT Other considerations in CMOS technology include: Latch-up ESD protection Temperature influence Noise influence Design rules are used to preserve the integrity of the technology 第*页 Homework Exercises Problem 2.1-1, 2.1-2, 2.2-1, 2.2-5, 2.3-1, 2.3-2, 2.3-5, 2.5-1, 2.6-1,2.6-6,2.6-7 ∝ * * ＝q(pμp+nμn)E 10 to the pow