毕业设计（论文）-基于EDA的FIR滤波器的设计.doc

摘 要 在现代电子系统中，FIR滤波器以良好的线性特征被广泛使用，属于数字信号处理的基本模块之一。在工程实践中，往往要求对信号处理要有实时性和灵活性，而已有的一些软件和硬件实现方式则难以同时达到这两方面的要求。随着可编程逻辑器件和CDA技术的发展，使用FPGA来实现FIR滤波器，既具有实时性，又兼顾了一定的灵活性，越来越多的电子工程师采用FPGA器件来实现FIR滤波器。 本文从实际应用出发，研究了FIR数字滤波器的FPGA的实现。针对以分布式算法实现FIR滤波器的设计过程，研究 FIR滤波器的系数的获取方法和处理过程。基于FPGA本身具有查找表的结构，非常适合实用分布式算法，在FIR滤波器的结构设计上，将FIR滤波器中关键的乘法运算转化为查找表的过程和加法运算的过程。 本课题在研究了大量国内外技术文献的基础上。首先，总结了FIR滤波器发展的现状和水平，认真分析了FIR滤波器的基本结构和设计原理；其次，将硬件描述语言的特点作了归纳，对硬件描述语言的基本结构进行了阐述，并说明了应用HVDL的EDA设计流程。 再次，研究了分布式算法，在阐述算法原理的基础上，分析了利用FPGA特有的查找表结构完成这一运算的方法，从而解决了常系数乘法算法硬件实现的问题；以4阶为例，同时采用乘法器结构和分布式算法实现，并对其性能进行比较；最后，采用自底向上的原则对21阶FIR滤波器各模块进行设计、仿真验证和综合，结果表明：该数字滤波器的工作频率达到预期要求。具体实现中，采用硬件语言VHDL，在XILINX公司出品的ISE 9.1平台上进行电路设计。 ABSTRACT In the modern electrical system, the FIR digital filter is used form any practical applications for its good linear phase character, and it provide an important function in digital signal processing design. In engineering practice, there is always a real-time and flexible requirement for signal processing. However, software and hardware techniques available for implementation are difficult to meet the demand for the two aspects in the same time. Along with the development of PLD device and EDA technology, more and more electrical engineers use FPGA to implement FIR filter, as it not only meet the real-time requirement, but also has some flexibility. Traditional design methods of FIR digital filter include windows function method, frequency sampling method and equal ripple approximation method. The implementation of the Digit Filter by the FPGA has been studied from practical aspect. Distribute algorithm and the design process are put emphasis on. How to get FIR filter coefficients and filter coefficients and process those coefficients ale introduced．The dissertation expatiate on the distribute algorithm．The key operation in FIR digital filter is multiplication operation，and it Can convert multiplication to look up table and addition by adopting the distribute algorithm．It is very suitable to adop