高速列车论文高速列车噪声测试系统及数据处理设计.docVIP

高速列车论文：高速列车噪声测试系统及数据处理设计 【中文摘要】近年来,随着我国经济和社会的快速发展,我国的高速铁路得到了飞快的发展,大规模建设高速铁路基础设施成为解决民生问题的重要举措之一。高速铁路运量大、效能高,缓解了既有线运能紧张的局面,又推动了沿线中小城市的高速发展和功能升级,促进新兴城镇发展,加快了我国城市化得整体进程,最终满足全面小康社会的需要。高速铁路带带来的经济效益、社会效益的同时,其运行产生的噪声污染也给我们带来了相应的环境问题。为解决高速铁路列车运行噪声带来的环境问题,要对高速列车噪声进行测试。本文主要内容有两部分,一部分是噪声采集系统的设计；一部分是对采集到信号的数据处理。噪声采集系统设计是以FPGA为主控制器的噪声采集系统,包括从传声器接收到信号,传输给信号调理器,经调理器调理放大,滤波之后传输给AD转换器转换成数字信号之后,送给FPGA主控制器处理,将数据存储在NAND FLASH中,然后把数据送给上位机处理。噪声的数据处理主要是通过编程计算出噪声的A计权和1/3倍频程,A计权和1/3倍频程是噪声处理中最重要的两个指标,A计权是人耳听觉最近似一致的,通过分析对比A计权和1/3倍频程,来得山高速列车噪声分布规律的特点,为高速列车降噪改型提出数据依据。 【英文摘要】In recent years.high speed rail achieve rapid development with the rapid development of economy and society in our country. It’s one of the important methods to solve the minsheng problem to construct high speed rail massively.High speed train has great volume and efficiency,which could not only alleviate the tense situation of traffic.but also promote rapid development and function upgrade in the town along the railway.It will facilitate the development of new town.accelerate the urbanization process in our country,and meet the demand of well-off city finally. With the great effect on economy and society.high speed rail generates noise pollution in move,which brings relevant environment problem.So it抯 necessary to measure the noise in high speed train.There抯 two stages in this thesis.one for the design of noise data accquistion system and the other for the data analysis.Noise data accquision system is based on the controller FPGA.At first,the microphones transform the signal,then the signal disposal device achive the amplification and filter process in the signal.at last AD converter transforms the analog signal into digital signal.FPGA Contrls the whole process,stores the data in NAND FLASH and transfer it to upper computer.A weighting and 1/3 octave are two most important parameters in data analysis,which are calculated by programming. A weighting is approximate consistent of ear hearing,which is compared to 1/3 octave.